Intel Clarifies Internal Foundry Model, Filled With Accountability

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Last week, Intel conducted an investor Webinar that provided a far more in-depth explanation of the company’s new IDM 2.0 model and how Intel Foundry Services (IFS) fits into this model. The most important piece of information provided is that Intel has grouped its TD (Technology Development), manufacturing, and IFS units together and given this group its own P&L responsibility. This move sharply contrasts with Intel’s previous working model for the TD and manufacturing groups, which allocated 100 percent of their operational costs to four BUs (business units): IFS, CCG (Client Computing Group), DCAI (Data Center and Artificial Intelligence), and NEX (Network and Edge Group). In the previous working model, the BUs were somewhat cost-insensitive to their behavior. They could expedite orders and could respin their designs at will without incurring a significant financial burden. The new IDM 2.0 model makes the BUs directly responsible for the costs of their manufacturing decisions just like any fabless semiconductor company working with a third-party foundry.

This move is CEO Pat Gelsinger’s way of making everyone in his organization more accountable for their behavior. David Zinsner, Executive Vice President and CFO at Intel, described the move as critical to Intel’s strategy going forward. Because of these changes, Intel believes it will cut manufacturing costs by $3 billion in 2023 and $8 billion to $10 billion as the company exits 2025. Zinsner said that Intel was on its way to achieving $3 billion in savings this year, including a $2 billion reduction in OpEx and $1 billion reduction in cost of sales, with more detail to be provided during the company’s Q2 earnings report in July.

Because the TD and manufacturing units will now be charging the BUs for its services, Intel is creating standardized pricing for the four BUs, including IFS, based on comparable industry benchmarks from competing semiconductor foundries and OSAT (outsourced semiconductor assembly and test) vendors. This puts Intel’s TD and manufacturing units on a more equal footing with outside vendors, and in theory, allows BUs to go outside of Intel for foundry and OSAT services if the BUs think they can get a better deal from those outside vendors. These arrangements are aligned with Gelsinger’s desire to return Intel to the competitive stance it once held. Zinsner laid out the situation succinctly:

“To put a finer point on this today, our manufacturing, technology development and IFS groups comprise roughly 40% of our head count, 25% of our OpEx and more than 90% of our CapEx, yet our ability to benchmark and track the effectiveness of these investments has historically been obscured by the lack of transparency inherent in an allocated cost model. Our pivot to giving manufacturing its own P&L is critical to identifying cost reductions. This new model will add transparency and comparability that exposes the true economics of the business by more directly measuring the financial performance of our teams with peers. It will also drive accountability as we harden the connection between decisions and costs.”

Jason Grebe, Corporate Vice President & General Manager of the Corporate Planning Group at Intel, also participated in the call and gave a detailed account of one factor driving these changes:

“…what we’ve seen over time is that both on the engineering side or early development as well as the high-volume manufacturing side, we drive a lot of expedites into the factory trying to pull in material and expedite material through, which at the end of the day really slows down the factory efficiency and overall full toolset implementations that we’re driving. So, what we started to do both from a process perspective and from an accountability and traceability perspective was attack that problem right away.”

Intel is attacking the problem by creating financial disincentives for BUs to expedite material, which will encourage BUs to make sure that the expedited order is truly needed. The intent is to minimize expedited material and even banish the practice from the fab whenever possible. By tracking expedited requests and billing for those services, the manufacturing group will establish a more rational customer/supplier relationship with the Intel BUs.

Although these changes will clearly influence BU behavior at Intel, by placing the costs of the manufacturing decisions they make squarely on their shoulders, it’s perhaps less clear how these changes might influence the manufacturing group’s efforts to reduce costs and stay competitive with the industry or how it might affect TD’s behavior in developing new process nodes, a place where Intel has fallen behind. Zinsner provided clarity there too:

“…because we’re measuring external or internal foundry as a P&L, or a foundry is a P&L, they’re highly incentivized now to grow their P&L, which means they’re highly incentivized to grow their revenue to load their fabs. They’re going to bend over backwards to do that.”

If Intel manufacturing does not continue to focus on operational costs and efficient operations, it will not be competitive with outside semiconductor foundries and the unit’s P&L will suffer. If Intel TD fails to develop advanced process nodes that meet or exceed the development schedules of competing foundries, the P&L will suffer. If IFS does not aggressively capture outside customers for its services, the P&L will suffer.

Gelsinger was mentored by Andy Grove and has brought a strong sense of accountability back to Intel. He’s fixing a corporate problem foreseen by Grove, who said:

“Success breeds complacency. Complacency breeds failure. Only the paranoid survive.”

Perhaps Gelsinger is not as paranoid as Grove was as Intel’s CEO, but he certainly seems to know how to walk in Grove’s shoes.

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